Omega OME-PIO-D144 Bedienungsanleitung

www.omega.com e-mail: [email protected]’s GuideOME-PIO-D144PCI-BusDigital I/O BoardHardware ManualShop online at

2.5 Interrupt Operation The PC0, PC1, PC2, PC3 of CN1_PC can be used as interrupt signal source. Refer to Sec. 2.1 for PC0/1/2/3 location. The int

Example 1: assume initial level=Low, PC0 is used as interrupt source: Initial=LowIniaial_sub() { now_int_state=0 _outpd(wBase+0x2a,0) /*(select th

Example 2: assume initial level=High, PC0 is used as interrupt source: Initial=HighInverted=Low Iniaial_sub() { now_int_state=1 _outpd(wBase+0x2a,1

Example 3: assume CN1_PC0 is initial Low, active High, CN1_PC1 is initial High, active Low CN1_PC2 is initial Low, active High

void interrupt irq_service() { char cc; int_num++; /* 1. Read interrupt signal status */ new_int_state=inp(wBase+0x07)&0xff; /* 2.

2.6 Daughter Boards 2.6.1 OME-DB-37 The OME-DB-37 is a general purpose daughter board with D-sub 37 pin connector. It is designed for easy wir

2.6.4 OME-ADP-37/PCI & OME-ADP-50/PCI The OME-ADP-37/PCI & OME-ADP-50/PCI are extenders for the 50-pin headers. One side of the OME-ADP-37

2.6.5 OME-DB-24P/24PD Isolated Input Board The OME-DB-24P is a 24 channel isolated digital input daughter board. The optically isolated inputs of

2.6.6 OME-DB-24R/24RD Relay Board The OME-DB-24R, 24 channel relay output board, consists of 24 form C relays for efficient switching of load via

2.6.7 OME-DB-24PR/24POR/24C OME-DB-24PR 24 × power relay, 5A/250V OME-DB-24POR 24 × Photo MOS relay, 0.1A/350VAC OME-DB-24C 24 × open collector,

Servicing North America:USA: One Omega Drive, P.O. Box 4047ISO 9001 Certified Stamford CT 06907-0047TEL: (203) 359-1660 FAX: (203) 359-7700e-mail: inf

2.6.8 Daughter Board Comparison Table 20-pin flat-cable 50-pin flat-cable D-sub 37-pin OME-DB-37 No No Yes OME-DN-37 No No Yes OME-ADP-37/PCI

2.7 Pin Assignment CN1: 37-PIN of D-type female connector. Pin Number Description Pin Number Description 1 N. C. 20 VCC 2 N. C. 21 GND 3 PB7

CN2/CN3/CN4/CN5/CN6: 50-PIN in of flat-cable connector Pin Number Description Pin Number Description 1 PC7 2 GND 3 PC6 4 GND 5 PC5 6 GND 7 PC4

3. I/O Control Register 3.1 How to Find the I/O Address The plug & play BIOS will assign a proper I/O address to every OME-PIO/PISO serie

The sub-IDs of OME-PIO/PISO series card are given as following: OME-PIO/PISO series card Description Sub_vendor Sub_device Sub_AUX OME-PIO-D144 (Rev

3.1.1 PIO_DriverInit PIO_DriverInit(&wBoards, wSubVendor,wSubDevice,wSubAux) • wBoards=0 to N Æ Number of boards found in this PC • wSubV

3.1.2 PIO_GetConfigAddressSpace PIO_GetConfigAddressSpace(wBoardNo,*wBase,*wIrq, *wSubVendor, *wSubDevice, *w

3.1.3 Show_PIO_PISO Show_PIO_PISO(wSubVendor, wSubDevice, wSubAux) • wSubVendor Æ subVendor ID of board to find • wSubDevice Æ subDevice ID of

3.2 The Assignment of I/O Address The Plug & Play BIOS will assign the proper I/O address to OME-PIO/PISO series card. If there is only one OME-

Step3: The user can identify the specified PIO/PISO card if they compare the wSlotBus & wSlotDevice in step2 to step1. The simplest way to find

OME-PIO-D144 User’s Manual OME-PIO-D144 User’s Manual (Ver.2.1, Sep/2001, PPH-009-21) ----- 1

3.3 The I/O Address Map The I/O address of PIO/PISO series card is automatically assigned by the main board ROM BIOS. The I/O address can also be

3.3.2 AUX Control Register (Read/Write): wBase+2 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Aux7 Aux6 Aux5 Aux4 Aux3 Aux2 Aux1 Aux0 N

3.3.5 Aux Status Register (Read/Write): wBase+7 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Aux7 Aux6 Aux5 Aux4 Aux3 Aux2 Aux1 Aux0 Not

3.3.7 Read/Write 8-bit data Register (Read/Write): wBase+0xc0 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 D7 D6 D5 D4 D3 D2 D1 D0 Note

3.3.9 I/O Selection Control Register (Write): wBase+0xc8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 0 CN2_PC CN2_PB CN2_PA CN1_PC

4. Demo Program There are about 5 demo programs provided on the company floppy disk or CD- ROM. The source programs for library &

4.1 OME-PIO-D144.H /* The header file for OME-PIO-D144 card */ #define Disable 0 #define Enable 1 #define D144

4.2 Demo1: Use D/O of CN1 /* ----------------------------------------------------------- */ /* demo 1 : D/O demo */ /* s

outp(wBase+0xcc,0x00); /* CN3 to CN4 port are all output */ outp(wBase+0xd0,0x00); /* CN5 to CN6 port are all output */ for (;;) { printf("\

4.3 Demo2: Use D/O of CN1~CN6 /* ------------------------------------------------------------ */ /* demo 2 : D/O demo for CN1 ~ CN6

Table of Contents 1. INTRODUCTION ...

/* CN1 : K=0/1/2 --> key in 0 */ /* CN2 : K=3/4/5 --> key in 3 */ /* CN3 : K=6/7/8 --> key in 6 */ /* CN4 : K=9/10/11 -->

4.4 Demo3: Interrupt demo1 /* ----------------------------------------------------------- */ /* demo 3 : count high pulse of CN1_PC0

outp(wBase+5,0); /* disable all interrupt */ PIO_DriverClose(); } /* --------------------------------------------------------------- */ /* Use PC

4.5 Demo4: Interrupt demo2 /* -----------------------------------------------------------*/ /* demo 4 : count low pulse of PC0

outp(wBase+5,0); /* disable all interrupt */ PIO_DriverClose(); } /* ------------------------------------------------------------ */ /* Use PC0 a

4.6 Demo5: Interrupt demo3 /* ----------------------------------------------------------- */ /* demo 5 : four interrupt source

for (;;) { printf("\n(CNT_L, CNT_H) = (%d,%d) (%d,%d) (%d,%d) (%d,%d) %x", CNT_L1,CNT_H1,CNT_L2,CNT_H2,CNT_L3,CNT_H3,CNT_L4,C

if ((int_c&0x01) != 0) { cc=new_int_state&0x01; if (cc !=0) CNT_H1++; else CNT_L1++; invert=invert ^ 1; } if ((int_c&0x02

4.7 DEMO 6: Outport of CN1-CN6 /* ------------------------------------------------------------ */ /* demo 6 : D/O demo

sleep(1); } outp(IO_SCR1,0x00); printf("\n"); for(i=1;i<=0x80;i=i<<1) { printf("\nCN3: PA=%02xH, PB=%02xH, PC=%02x

4. DEMO PROGRAM...33 4.1 OME-PIO-D

4.8 Demo10: Find Card Number /* ------------------------------------------------------------- */ /* demo 10: Find card number

OME-PIO-D144 User’s Manual (Ver.2.1, Sep/2001) ----- 49 ok=1; outp(wBase+0xc8,0x00); /* CN2_PA is output */ outp(wBase+0xcc,0x01); /* CN3_P

WARRANTY/DISCLAIMEROMEGA ENGINEERING, INC. warrants this unit to be free of defects in materials and workmanship for aperiod of 13 months from date of

M4037/0104Where Do I Find Everything I Need for Process Measurement and Control? OMEGA…Of Course!Shop online at www.omega.comTEMPERATUREThermocouple

1. Introduction The OME-PIO-D144 consists of one D-Sub 37 & five 50-pin flat-cable connectors. There are three 8-bit ports - PA, PB & PC -

2. Hardware configuration 2.1 Board Layout PCI BUSOME-PIO-D144CN1D-Sub 37 PINCN1_PACN1_PCCN1_PBCN350-PINCN3_PACN3_PCCN3_PBCN650-PINCN6_PACN

2.2 I/O Port Location There are eighteen 8-bit I/O ports in the OME-PIO-D144. Every I/O port can be programmed as D/I or D/O port. When the PC is

2.4 D/I/O Architecture disable\ input Latch Clock input D/O latch CKT RESET\ (Sec. 3.3.1) Data (Se